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CPUID (view source)

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The CPUID instruction can be used to retrieve various amount of information about your cpuCPU, likesuch as its vendor string and model number, the size of internal caches and (more interesting), the list of CPU features supported.
 
== How to use CPUID ==
=== Checking CPUID availability ===
Prior to using the CPUID instruction, you should also make sure the processor supports it by testing the 'ID' bit (0x200000) in eflags. This bit is modifiable only when the CPUID instruction is supported. For systems that don't support CPUID, changing the 'ID' bit will have no effect.
 
'''Note:''' Implementing this routine in for example C can lead to issues, because the compiler may change EFLAGS at any time.
Note that prior to use the CPUID instruction, you should also make sure the processor supports it by testing the 'ID' bit (0x200000) in eflags (modifiable only when the CPUID instruction is supported. For systems that don't support CPUID, writing a '1' at that place will have no effect).
An Assembly-routine that checks whether CPUID is supported looks like the following:
 
This assembly routine checks if CPUID is supported:
<source lang="asm">
; returns zero if CPUID is not supported. returns 1 otherwise.
pushfd
pop eax
mov ebx, eax
xor eax, 0x200000
and ebx, 0x200000
push eax
popfd
pushfd
pop eax
and eax, 0x200000
xor eax, ebx
shr eax, 21
ret
</source>
 
<syntaxhighlight lang="asm">
pushfd ;Save EFLAGS
pushfd ;Store EFLAGS
xor dword [esp],0x00200000 ;Invert the ID bit in stored EFLAGS
popfd ;Load stored EFLAGS (with ID bit inverted)
pushfd ;Store EFLAGS again (ID bit may or may not be inverted)
pop eax ;eax = modified EFLAGS (ID bit may or may not be inverted)
xor eax,[esp] ;eax = whichever bits were changed
popfd ;Restore original EFLAGS
and eax,0x00200000 ;eax = zero if ID bit can't be changed, else non-zero
ret
</syntaxhighlight>
 
Note 1: There are some old CPUs where CPUID is supported but the ID bit in EFLAGS is not (NexGen). There are also CPUs that support CPUID if and only if it has to be enabled first (Cyrix M1).
 
Note 2: You can simply attempt to execute the CPUID instruction and see if you get an invalid opcode exception. This avoids problems with CPUs that do support CPUID but don't support the ID bit in EFLAGS; and is likely to be faster for CPUs that do support CPUID (and slower for CPUs that don't).
 
=== Basic usage ===
The idea of the CPUID instruction is that you can call it with different values in EAX, and it will return different information about the processor. For example, if we want the Vendor ID String (see below), we should code something like that:
 
<sourcesyntaxhighlight lang="asm">
mov eax, 0x0
cpuid
</syntaxhighlight>
</source>
 
There are differences between AMD and Intel. According to the Intel CPUID application note, we should first check the Vendor ID String for "GenuineIntel" before taking out information, such as the Processor Signature, Processor Feature Flags, etc.
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When called with EAX = 0, CPUID returns the vendor ID string in EBX, EDX and ECX. Writing these to memory in this order results in a 12-character string. These can be tested against known Vendor ID strings:
 
<sourcesyntaxhighlight lang="c">
/*/ Vendor- strings. */from CPUs.
#define CPUID_VENDOR_AMD "AuthenticAMD"
#define CPUID_VENDOR_OLDAMD "AMDisbetter!" //early engineering samples of AMD K5 processor
#define CPUID_VENDOR_AMD_OLD "AMDisbetter!" // Early engineering samples of AMD K5 processor
#define CPUID_VENDOR_AMD "AuthenticAMD"
#define CPUID_VENDOR_INTEL "GenuineIntel"
#define CPUID_VENDOR_VIA "CentaurHaulsVIA VIA VIA "
#define CPUID_VENDOR_OLDTRANSMETACPUID_VENDOR_TRANSMETA "TransmetaCPUGenuineTMx86"
#define CPUID_VENDOR_TRANSMETA CPUID_VENDOR_TRANSMETA_OLD "GenuineTMx86TransmetaCPU"
#define CPUID_VENDOR_CYRIX "CyrixInstead"
#define CPUID_VENDOR_CENTAUR "CentaurHauls"
#define CPUID_VENDOR_NEXGEN "NexGenDriven"
#define CPUID_VENDOR_UMC "UMC UMC UMC "
#define CPUID_VENDOR_SIS "SiS SiS SiS "
#define CPUID_VENDOR_NSC "Geode by NSC"
#define CPUID_VENDOR_RISE "RiseRiseRise"
#define CPUID_VENDOR_VORTEX "Vortex86 SoC"
</source>
#define CPUID_VENDOR_AO486 "MiSTer AO486"
#define CPUID_VENDOR_AO486_OLD "GenuineAO486"
#define CPUID_VENDOR_ZHAOXIN " Shanghai "
#define CPUID_VENDOR_HYGON "HygonGenuine"
#define CPUID_VENDOR_ELBRUS "E2K MACHINE "
// Vendor strings from hypervisors.
#define CPUID_VENDOR_QEMU "TCGTCGTCGTCG"
#define CPUID_VENDOR_KVM " KVMKVMKVM "
#define CPUID_VENDOR_VMWARE "VMwareVMware"
#define CPUID_VENDOR_VIRTUALBOX "VBoxVBoxVBox"
#define CPUID_VENDOR_XEN "XenVMMXenVMM"
#define CPUID_VENDOR_HYPERV "Microsoft Hv"
#define CPUID_VENDOR_PARALLELS " prl hyperv "
#define CPUID_VENDOR_PARALLELS_ALT " lrpepyh vr " // Sometimes Parallels incorrectly encodes "prl hyperv" as "lrpepyh vr" due to an endianness mismatch.
#define CPUID_VENDOR_BHYVE "bhyve bhyve "
#define CPUID_VENDOR_QNX " QNXQVMBSQG "
</syntaxhighlight>
You already know that the Vendor ID String is returned in EBX, ECX, EDX. Let us take an Intel processor. It should return "GenuineIntel". Look at the following text to see how the string is placed in the registers:
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Recent processors also use ECX for features (which form a different set), with which you should be very careful as some old CPUs return bogus information in this register.
 
<sourcesyntaxhighlight lang="c">
enum {
CPUID_FEAT_ECX_SSE3 = 1 << 0,
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CPUID_FEAT_ECX_SSSE3 = 1 << 9,
CPUID_FEAT_ECX_CID = 1 << 10,
CPUID_FEAT_ECX_SDBG = 1 << 11,
CPUID_FEAT_ECX_FMA = 1 << 12,
CPUID_FEAT_ECX_CX16 = 1 << 13,
CPUID_FEAT_ECX_ETPRDCPUID_FEAT_ECX_XTPR = 1 << 14,
CPUID_FEAT_ECX_PDCM = 1 << 15,
CPUID_FEAT_ECX_PCID = 1 << 17,
CPUID_FEAT_ECX_DCA = 1 << 18,
CPUID_FEAT_ECX_SSE4_1 = 1 << 19,
CPUID_FEAT_ECX_SSE4_2 = 1 << 20,
CPUID_FEAT_ECX_x2APICCPUID_FEAT_ECX_X2APIC = 1 << 21,
CPUID_FEAT_ECX_MOVBE = 1 << 22,
CPUID_FEAT_ECX_POPCNT = 1 << 23,
CPUID_FEAT_ECX_TSC = 1 << 24,
CPUID_FEAT_ECX_AES = 1 << 25,
CPUID_FEAT_ECX_XSAVE = 1 << 26,
CPUID_FEAT_ECX_OSXSAVE = 1 << 27,
CPUID_FEAT_ECX_AVX = 1 << 28,
CPUID_FEAT_ECX_F16C = 1 << 29,
CPUID_FEAT_ECX_RDRAND = 1 << 30,
CPUID_FEAT_ECX_HYPERVISOR = 1 << 31,
 
CPUID_FEAT_EDX_FPU = 1 << 0,
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CPUID_FEAT_EDX_PSE36 = 1 << 17,
CPUID_FEAT_EDX_PSN = 1 << 18,
CPUID_FEAT_EDX_CLF CPUID_FEAT_EDX_CLFLUSH = 1 << 19,
CPUID_FEAT_EDX_DTESCPUID_FEAT_EDX_DS = 1 << 21,
CPUID_FEAT_EDX_ACPI = 1 << 22,
CPUID_FEAT_EDX_MMX = 1 << 23,
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CPUID_FEAT_EDX_SS = 1 << 27,
CPUID_FEAT_EDX_HTT = 1 << 28,
CPUID_FEAT_EDX_TM1CPUID_FEAT_EDX_TM = 1 << 29,
CPUID_FEAT_EDX_IA64 = 1 << 30,
CPUID_FEAT_EDX_PBE = 1 << 31
};
</syntaxhighlight>
</source>
 
== Using CPUID from GCC ==
 
Alternatively, one can use the __get_cpuid function that comes with GCC. To use this function, include <cpuid.h>.
 
<syntaxhighlight lang="c">
#include <cpuid.h>
 
/* Example: Get CPU's model number */
static int get_model(void)
{
int ebx, unused;
__cpuid(0, unused, ebx, unused, unused);
return ebx;
}
 
/* Example: Check for builtin local APIC. */
static int check_apic(void)
{
unsigned int eax, unused, edx;
__get_cpuid(1, &eax, &unused, &unused, &edx);
return edx & CPUID_FEAT_EDX_APIC;
}
 
</syntaxhighlight>
 
{{Disputed}}
 
CPUID can be invoked with various request codes (in eax) and will return values in general registers (much as a built-in service interrupt). The following code is made Public Domain out of Clicker's x86/cpu.h
 
<sourcesyntaxhighlight lang="c">
/* DEPRECATED: You should use the <cpuid.h> header that comes with GCC instead. */
 
enum cpuid_requests {
CPUID_GETVENDORSTRING,
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/** issue a single request to CPUID. Fits 'intel features', for instance
* note that even if only "eax" and "edx" are of interrestinterest, other registers
* will be modified by the operation, so we need to tell the compiler about it.
*/
static inline void cpuid(int code, dworduint32_t *a, dworduint32_t *d) {
asm volatile("cpuid":"=a"(*a),"=d"(*d):"0a"(code):"ecx","ebx");
}
/** issue a complete request, storing general registers output as a string
*/
static inline int cpuid_string(int code, dworduint32_t where[4]) {
int highest;
asm volatile("cpuid":"=a"(*where),"=b"(*(where+1)),
"=c"(*(where+2)),"=d"(*(where+3)):"0a"(code));
return highest(int)where[0];
}
</syntaxhighlight>
</source>
 
== See Also ==
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=== Articles ===
* [[VMX]] Intel's Virtual-Machine Extensions
* [[Detecting CPU Topology (80x86)]] Detecting CPU Topology on 80x86
 
=== Threads ===
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===External Links===
* You can check out [http://sandpile.org/ia32x86/cpuid.htm SandPile.org] for an exhaustive list of functions available through CPUID instruction.
* Intel's [http://bochs.sourceforge.net/techspec/24161821.pdf CPUID Specification]
* AMD's [http://wwwsupport.amd.com/us-en/assets/content_type/white_papers_and_tech_docsTechDocs/25481.pdf CPUID Specification]
 
[[Category:X86 CPU]]
[[Category:Hardware Detection]]
[[de:CPUID]]
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