ARM SMMU versions 1 and 2: Difference between revisions
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m moved User:Gravaera/ARM SMMU versions 1 and 2 to ARM SMMU versions 1 and 2: Mature enough that I can move it out into the global namespace now |
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* For SMMUv1, the SMMU_CBAR register states which interrupt is raised to signal faults while processing that context.
* For SMMUv2, each context bank has its own IRQ pin.
[[Category:ARM]]
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