ARM Overview: Difference between revisions

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{| class="wikitable"
! colspan="8" | Little Endian Word Size (32Bit32-bit)
|-
| ED || CB || A9 || 87 || 78 || 9A || BC || DE
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{| class="wikitable"
! colspan="8" | Little Endian Half-Word Size (16Bit16-bit)
|-
| ED || CB || A9 || 87 || 78 || 9A || BC || DE
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{| class="wikitable"
! colspan="8" | Byte Size (8Bit8-bit)
|-
| ED || CB || A9 || 87 || 78 || 9A || BC || DE
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|}
 
''From reading the data sheet it appears that if operating in big endian mode the half-word access would be reversed to be more natural as you would expect on the X86x86/64x64 architecture. But, since I can not actually test it at the moment I am hoping I got it right.''
 
''The word access with offset of ''10b (0x2)'' may be defined, but I am not sure because it does not really state. However, it may employ some of the mechanisms for loading half-words. (Need someone to come through and correct this if it is wrong)''