ARM Integrator-CP IRQTimerAndPICAndTaskSwitch: Difference between revisions

== ARM Integrator-CP IRQ, Timer, PIC, And Task Switching ==

This demonstrates initializing the exceptions vector table, timer 0, and the programmable interrupt controller. Then performing task switching between different tasks. It shows a simple method to switch

between different tasks.

 

=== Notes ===

On ARM the SWI instruction disables IRQ interrupts on entry which is what I am using for task switching. So no switching occurs during an SWI which keeps the code simpler, and easy to understand. When the CPU switches into IRQ mode (interrupt) it is non-re-entrant unless an FIQ happens. I use no FIQ interrupts below.

 

=== Tools ===

 

=== Source ===

#ifdef B64

typedef unsigned long long uintptr;

typedef struct _KTHREAD {

uint8 valid;

uint32 r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, sp, lr, cpsr, pc;

} KTHREAD;

kt = &ks->threads[ks->threadndx];

kt->pc = ((uint32*)KSTACKEXC)[-1];

kt->r6 = ((uint32*)KSTACKEXC)[-8];

kt->cpsr = ((uint32*)KSTACKEXC)[-15];

/*

kserdbg_puts(buf);

/* switch to system mode get registers then switch back */

orr r0, r0, #0x1f \n\

msr cpsr, r0 \n\

mov %[sp], sp \n\

mov %[lr], lr \n\

orr r0, r0, #0x12 \n\

msr cpsr, r0 \n\

*/

((uint32*)KSTACKEXC)[-1] = kt->pc;

((uint32*)KSTACKEXC)[-8] = kt->r6;

((uint32*)KSTACKEXC)[-15] = kt->cpsr;

/* switch into system mode restore hidden registers then switch back */

orr r0, r0, #0x1f \n\

msr cpsr, r0 \n\

mov sp, %[sp] \n\

mov lr, %[lr] \n\

orr r0, r0, #0x12 \n\

msr cpsr, r0 \n\

for(;;);

}

 

=== Linker Script (file: link.ld) ===

This is saved in a file named ''link.ld'' which is referenced by the linker. QEMU loads the image to 0x10000, but on a real piece of hardware it might be different. This load position by QEMU may have something to do with the integrator-cp board, but I am not sure. Most ARM code is actually position independent code because the branch instructions do not address 32-bits and this is because of the 32-bit size of all instructions in ARM mode. But, when your code references symbols in the other sections it will use absolute addressing. It is possible in theory for GCC to emit position independent data references but I have found no standard option. I have heard of patches that add this ability to GCC, but just keep this in mind. I also yank out the text section in the build scripts below to make a flat binary and this is why I place everything into the text section.

ENTRY (entry)

 

_EOI = .;

}

 

=== Compile And Link ===

''I only left it out because I would rather wet your appetite instead of run you away with this being difficult to compile or link.''

 

arm-eabi-gcc -s -I./inc -nostdlib -nostartfiles -ffreestanding -std=gnu99 -c *.c

arm-eabi-ld -T link.ld -o __arm.bin *.o

arm-eabi-objcopy -j .text -O binary __arm.bin arm.bin

 

=== Test ===

qemu-system-arm -m 8 -kernel arm.bin -serial stdio

 

=== Going Further ===

I would take a good look at all the parts of this demonstration and ensure you understand what each part does. I would recommend you pay careful attention to the exception entry and exit routines and make sure that you understand each instruction and how it works. This will save you a headache later on when things

are not acting quite right. But, here are some links to continue with. These are ''not'' the only links, but are just a few that I thought would be quite helpful.

 

{| class="wikitable"

| [[ARM_Integrator-CP_PL110_Dirty|PL110 - Color Display|QEMU PL110 Color Display]]

| Take your system to the next level with color graphics!

|}