APIC Timer: Difference between revisions

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(New APIC timer setup example code.)
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The great benefit of the Local APIC timer that it's is hardwired to each CPU core, asunlike opposite tothe [[PIT|Programmable Interval Timer]] which is a separate circuit. Because of this, there is no need tofor any resource management, which makemakes things easier. The downside is that it's oscillating at (one of) the CPU's frequencies, which varies from machine to machine, while the PIT uses a standard frequency (1193182 Hz). To make use of it, you have to know how many interrupts/sec it's capable of.
 
== APIC Timer Modes ==
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== Initializing ==
There're are several ways to do this, but all of them use a different, CPU bus frequency independent clock source to do that. Examples: [[RTC|Real Time Clock]], [[TSC|TimeStamp Counter]], PIT or even polling [[CMOS#Getting_Current_Date_and_Time_from_RTC|CMOS registers]]. In this tutorial we will use the good old PIT, as it's the easiest. Steps need to be done:
* Reset APIC to a well known state
* Enable APIC timer
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The APIC timer can be set to make a tick (decrease counter) at a given frequency, which is called "divide value". This means you have to multiply APIC timer counter ticks by this divide value to get the true CPU bus frequency. You could use value of 1 (ticks on every bus cycle) up to 128 (ticks on every 128th cycle). See Intel manual vol3A Chapter 9.5.4 on details. Note that according to my tests, Bochs seems not to handle divide value of 1 properly, so I will use 16.
=== PrerequiresPrerequisites ===
Before we start, let's define some constant and functions.
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