Revision as of 21:48, 3 January 2023 view source osdev>Nudelerde the 14th and 15th Interrupt Command Register bits have been mixed up; see Volume 3A:System Programming Guide, Chapter 10.6.1 ← Older edit		Revision as of 21:55, 3 January 2023 view source osdev>Nudelerde m Reverted edits by Nudelerde (talk) to last revision by Sebastian Newer edit →
Line 314: \|- \| Bit 14 \| Clear for INIT level de-assert, otherwise set. ~~\| Level. 0 = De-assert, 1 = Assert (only 1 for INIT de-assert)~~ \|- \| Bit 15 \| ~~Trigger Mode. 0 = Edge, 1 = Level (only 1~~Set for INIT ~~assert and~~level de-assert), otherwise clear. \|- \| Bits 18-19

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