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AHCI: Difference between revisions
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Following code defines different kinds of FIS specified in Serial ATA Revision 3.0.
<
typedef enum
{
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FIS_TYPE_DEV_BITS = 0xA1, // Set device bits FIS - device to host
} FIS_TYPE;
</syntaxhighlight>
'''2) Register FIS – Host to Device'''
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A host to device register FIS is used by the host to send command or control to a device. As illustrated in the following data structure, it contains the IDE registers such as command, LBA, device, feature, count and control. An ATA command is constructed in this structure and issued to the device. All reserved fields in an FIS should be cleared to zero.
<
typedef struct tagFIS_REG_H2D
{
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uint8_t rsv1[4]; // Reserved
} FIS_REG_H2D;
</syntaxhighlight>
'''3) Register FIS – Device to Host'''
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A device to host register FIS is used by the device to notify the host that some ATA register has changed. It contains the updated task files such as status, error and other registers.
<
typedef struct tagFIS_REG_D2H
{
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uint8_t rsv4[4]; // Reserved
} FIS_REG_D2H;
</syntaxhighlight>
'''4) Data FIS – Bidirectional'''
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This FIS is used by the host or device to send data payload. The data size can be varied.
<
typedef struct tagFIS_DATA
{
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uint32_t data[1]; // Payload
} FIS_DATA;
</syntaxhighlight>
'''5) PIO Setup – Device to Host'''
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This FIS is used by the device to tell the host that it’s about to send or ready to receive a PIO data payload.
<
typedef struct tagFIS_PIO_SETUP
{
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uint8_t rsv4[2]; // Reserved
} FIS_PIO_SETUP;
</syntaxhighlight>
'''6) DMA Setup – Device to Host'''
<
typedef struct tagFIS_DMA_SETUP
{
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} FIS_DMA_SETUP;
</syntaxhighlight>
'''7) Example'''
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To issue an ATA Identify command to the device, the FIS is constructed at follows.
<
FIS_REG_H2D fis;
memset(&fis, 0, sizeof(FIS_REG_H2D));
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fis.device = 0; // Master device
fis.c = 1; // Write command register
</syntaxhighlight>
After the device receives this FIS and successfully read the 256 words data into its internal buffer, it sends a PIO Setup FIS – Device to Host to tell the host that it’s ready to transfer data and the data size (FIS_PIO_SETUP.tc).
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[[Image:HBA_registers.jpg]]
<
typedef volatile struct tagHBA_MEM
{
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uint32_t vendor[4]; // 0x70 ~ 0x7F, vendor specific
} HBA_PORT;
</syntaxhighlight>
This memory area should be configured as uncacheable as they are memory mapped hardware registers, not normal prefetchable RAM. For the same reason, the data structures are declared as "volatile" to prevent the compiler from over optimizing the code.
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Data FIS – Device to Host is not copied to this structure. Data payload is sent and received through PRDT (Physical Region Descriptor Table) in Command List, as will be introduced later.
<
typedef volatile struct tagHBA_FIS
{
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uint8_t rsv[0x100-0xA0];
} HBA_FIS;
</syntaxhighlight>
'''4) Command List'''
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[[Image:Command_list.jpg]]
<
typedef struct tagHBA_CMD_HEADER
{
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uint32_t rsv1[4]; // Reserved
} HBA_CMD_HEADER;
</syntaxhighlight>
'''5) Command Table and Physical Region Descriptor Table'''
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[[Image:Command_table.jpg]]
<
typedef struct tagHBA_CMD_TBL
{
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uint32_t i:1; // Interrupt on completion
} HBA_PRDT_ENTRY;
</syntaxhighlight>
== Detect attached SATA devices ==
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There are four kinds of SATA devices, and their signatures are defined as below. The Port Signature register (HBA_PORT.sig) contains the device signature, just read this register to find which kind of device is attached at the port. Some buggy AHCI controllers may not set the Signature register correctly. The most reliable way is to judge from the Identify data read back from the device.
<
#define SATA_SIG_ATA 0x00000101 // SATA drive
#define SATA_SIG_ATAPI 0xEB140101 // SATAPI drive
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}
}
</syntaxhighlight>
== AHCI port memory space initialization ==
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The following example assumes that the HBA has 32 ports implemented and each port contains 32 command slots, and will allocate 8 PRDTs for each command slot. (Note: unlike in the above struct definitions, this is using 8 instead of 1)
<
#define AHCI_BASE 0x400000 // 4M
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}
</syntaxhighlight>
== AHCI & ATAPI ==
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The code example shows how to read "count" sectors from sector offset "starth:startl" to "buf" with LBA48 mode from HBA "port". Every PRDT entry contains 8K bytes data payload at most.
<
#define ATA_DEV_BUSY 0x80
#define ATA_DEV_DRQ 0x08
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return -1;
}
</syntaxhighlight>
== Checklist ==
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