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A20 Line: Difference between revisions
→Enabling
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If only one interrupt fails, you will have to use another method. (See below.)
===Access of 0xee===
On some systems reading ioport 0xee enables A20, and writing it disables A20. (Or, sometimes, this action only occurs when ioport 0xee is enabled.) And similar things hold for ioport 0xef and reset (a write causes a reset).
The i386SL/i486SL documents say
The following ports are visible only when enabled,
Any writes to these ports cause the action named.
Name of Register Address Default Value Where placed Size
FAST CPU RESET EFh N/A 82360SL 8
FAST A20 GATE EEh N/A 82360SL 8
Enable A20:
<source lang="asm">
in al,0xee
</source>
Disable A20:
<source lang="asm">
out 0xee,al
</source>
NOTE that it doesn't matter what al contains when outputting and al is undefined whhile reading (to / from port 0xee)
===Recommended Method===
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* Test if A20 is enabled in a loop with a time-out (as the fast A20 method may work slowly)
* If none of the above worked, give up
==See Also==
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